Eleven AI, security & CPU accelerators — taken from pure-Python golden models all the way to GDSII.
A clean-room, dependency-light hardware lab where every block is proven bit-exact against a mathematical reference before a single gate is placed. Named for the deities of Kemet (𓆎𓅓𓏏𓊖, ancient Egypt).
Modern silicon is locked behind seven-figure tools and NDAs. KemetCore is the opposite: a fully open, reproducible path from a few lines of Python to a tape-out-ready layout — repeated across eleven very different accelerators that together form a complete heterogeneous AI system-on-chip.
The thesis is simple and uncompromising: if you can't describe a computation as exact, executable math, you have no business building hardware for it. So each core begins life as a “golden model” — the specification, written as runnable code — and every later artifact (cycle model, RTL, gate netlist, layout) is checked against it, bit for bit.
Each accelerator is named for a Kemetic god whose domain mirrors its function — and each targets a real workload in AI, cryptography, graphics, or general compute.
A complete single-precision floating-point unit, every operation correctly rounded and checked against an exact rational reference:
multiply · add · fused-multiply-add (bf16, fp16, fp32) · divide · square root
The FMA fixed a latent double-rounding bug in its own reference and is exact to a single rounding; divide and sqrt use exact integer-division / integer-isqrt intermediates. Verified across millions of operands in cocotb / Verilator.
A complete processor, assembled from individually-verified blocks:
ALU · mul/div · immediate-gen · register file · ALU-control · decode · Zicsr · branch unit · load/store formatter → single-cycle core → 5-stage pipeline
The pipeline (IF/ID/EX/MEM/WB) runs real programs — loops, recursion, memory, control flow — with its full final register file matching the ISA simulator bit-for-bit. A data-forwarding variant then bypasses results between stages, issuing dependent instructions back-to-back: identical architectural state in far fewer cycles (a dependent chain runs in 14 cycles instead of 44), proven by running both pipelines side by side.
A length-agnostic RVV datapath with full active-element semantics (per-lane mask + vl), composed from the verified primitives:
integer lanes (add/sub/mul/logic/shift · min/max · vmacc · saturating & fixed-point · multiply-high · divide) · a complete fp32 lane set (add/sub/mul/fma/divide/sqrt over HapiCore · convert · compare · sign-inject · min/max with full NaN handling) · reductions (integer sum / signed & unsigned min·max / and·or·xor and fp sum·min·max) → integrated execute unit → register file + vsetvl → single-cycle vector core (with data memory + strip-mined unit-stride load/store).
A complete mask & data-motion toolkit rounds out the ISA: produce masks (vmseq/vmslt/…), combine them (vmand/vmor/…), reduce (vcpop/vfirst), index (viota/vid), compact (vcompress), permute (vrgather), slide (vslideup/down) and select (vmerge) — the full predication and shuffle vocabulary.
The core runs micro-programs (axpy, dot-product, reductions) with its full vector register file matching the golden model bit-for-bit — and every block is checked across thousands of randomised ops, masks and vector lengths, each synthesising latch-free.
The lattice arithmetic behind ML-KEM (Kyber), assembled from Barrett-reduced modular primitives over Zq[x]/(x²⁵⁶+1):
modular multiply · butterfly → a multicycle 256-point NTT engine (forward / inverse · cyclic & negacyclic) · pointwise multiply · polynomial add/sub · CBD noise sampler · message codec → a full negacyclic polynomial multiply that sequences three NTT passes and a pointwise stage end-to-end.
The a·b pipeline is checked bit-for-bit against both an NTT reference and an independent schoolbook multiplier — the whole transform machinery proven by the product it exists to compute.
Every standard Keccak and SHA-2 primitive, each checked bit-for-bit against the reference and the Python standard library:
SHA-2 (224 · 256 · 384 · 512) · SHA-3 / Keccak (224 · 256 · 384 · 512) · HMAC-SHA256 & -SHA512 · SHAKE128 / SHAKE256 extendable-output functions
The HMAC cores sequence the verified SHA-2 block compression through ipad/opad and the outer hash internally; the SHAKE XOFs implement the true two-phase sponge — absorb, then squeeze arbitrary-length output across successive permutations. Every hash matches hashlib across messages of every padding alignment.
Every core walks the same path. Nothing advances a phase until the previous one is green.
make all green.A “golden model is the law” philosophy: hardware can only be wrong if the math is wrong, and the math is tested first. Bugs are caught in Python, not in silicon.
Open tools end-to-end (Verilator, cocotb, Yosys, OpenROAD, ASAP7). Anyone can clone the repo and re-run the entire path from math to layout.
Tensor cores, sparse matmul, attention, a vector unit, post-quantum crypto, hashing, ray-tracing and a CPU — the pieces of a real heterogeneous accelerator, unified by one capstone SoC.
Each core is a self-contained, readable lesson in how a real accelerator is specified, built, verified and hardened — from rounding modes to pipeline hazards.
Lean, portable tooling and zero needless dependencies — the same discipline applied to the build flow as to the hardware.
Naming each block for a Kemetic deity isn’t decoration — it’s a map. The domain of the god tells you what the core does.
Floating-point cores are checked to the last ULP against exact rational arithmetic. The CPU is checked by running programs and comparing the entire register file to an instruction-set simulator. The ALU-control decoder is swept exhaustively over all 217 inputs. Synthesis asserts 0 latches on every block.
Nothing is “probably right.” Continuous integration re-runs the golden tests, the cocotb test-benches, and the Yosys latch checks on every change.